The present invention generally relates to a semiconductor device comprising a substrate and an interlayer insulating film having a thermally reflowable property and a fabrication process therefor, and more particularly to a countermeasure against deformation of a nitride film overlying the interlayer insulating film.
With progress toward high-integration, the prior-art semiconductor device has an increasing number of interconnection layers formed on the substrate. Accordingly, it is common practice in the art to perform a process comprising the steps of laying a first BPSG film over a first interconnection layer, followed by heat treating the first BPSG film for planarization thereof, and forming a second interconnection layer and then a second BPSG film on the first BPSG film, followed by planarization of the second BPSG film. This process has a drawback that when the second BPSG film is heat treated, the first BPSG film is also caused to reflow and dislocation of the second interconnection layer results. As prevention against this problem, a process including a step to lay a silicon nitride film over the first BPSG film is disclosed in Laid Open Unexamined Japanese Patent Publication No.5(1993)-160276.
FIG. 16 is a sectional view showing an example of the prior-art semiconductor device including such a silicon nitride film for prevention against the reflow of the second interconnection layer. As seen in FIG. 16, the semiconductor device is arranged such that a transistor gate 47 as the first interconnection layer is formed on a silicon substrate, a first BPSG film 48 as the first interlayer insulating film laid over the gate 47, a polycide interconnection 49 as the second interconnection layer formed on the first BPSG film 48. Formed on the first BPSG film 48 is a polycide interconnection 49 as the second interconnection layer. A protective silicon nitride film 50 is laid over the first BPSG film 48 for the purpose of preventing the reflow and oxidation of the first BPSG film and subsequently, a second BPSG film 51 as the second interlayer insulating film is laid over the silicon nitride film 50. This process is designed to utilize the silicon nitride film 50 for blocking vapor during the heat treatment for planarizing the second BPSG film 51 in an atmosphere of vapor, thereby preventing the reflow of the first BPSG film 48 and thus avoiding defects caused by dislocation of the polycide interconnection 49.
A method of fabricating a stacked DRAM cell often utilizes an oxidized silicon nitride film as a capacitor insulating film generally presenting prescribed properties such as refresh, isolation voltage and the like. Further, the BPSG film is of ten utilized for planarizing the base of a storage node.
Now referring to FIG. 17, a brief description will be made on the prior-art stacked DRAM structure. As seen in FIG. 17, the stacked DRAM structure comprises a silicon substrate 1, an overlying BPSG film 52 reflowable by a heat treatment at low temperatures, a storage node 54 including a contact portion 53 connected to an impurity diffusion layer in the silicon substrate 1, an oxidized silicon nitride film 55 serving as the capacitor insulating film, and a plate electrode 56. In such a structure, the oxidized silicon nitride film 55 as the capacitor insulating film exists partially on the BPSG film 52.
In addition, there is proposed a stacked DRAM structure including a cylindrical storage node for increasing the surface area of the storage node.
As seen in FIG. 18, this structure comprises a silicon substrate 1, a BPSG film 57 reflowable by a heat treatment at low temperatures, a silicon nitride film 58 serving as a wet etching stopper, a cylindrical storage node 60 including a contact portion 59 and connected to an impurity diffusion layer in the substrate 1, an oxidized silicon nitride film 61 serving as the capacitor insulating film, and a plate electrode 62. In this structure, as well, the oxidized silicon nitride film 61 as the capacitor insulating film exists partially on the BPSG film 57.
The aforementioned semiconductor devices known to the art have the following problems.
More recently, in response to a demand for fabricating a semiconductor device at lower temperatures, the BPSG film need be heat treated at lower temperatures. In order that such a low-temperature heat treatment may accomplish a similar flow and forming of the film to that offered by the heat treatment practiced in the art, the BPSG film contains boron and phosphorus in high concentrations. With the use of such a high-concentration BPSG film, the process wherein the silicon nitride film is deposited and oxidized to obtain the oxidized silicon nitride film shown in FIG. 17 or 18 have a drawback that a first BPSG film 63 tends to reflow so readily as to produce wrinkle in the silicon nitride film 64, as shown in FIG. 19A. The inventors of the present invention have found from experiments that the wrinkle tends to occur at a wide area with a low density of memory cells as well as at place under which a step in the first BPSG film 63 as the base is located. It was also found that as the thickness of the silicon nitride film 64 as the capacitor insulating film decreases, the incidence of wrinkle becomes greater.
The inventors investigated the cause of the above phenomenon to infer that the phenomenon may be caused by an action described as below. It is generally known that since the silicon oxide film, such as BPSG film, and the silicon nitride film differ in the thermal expansion coefficient and the crystallographic structure, a great stress is produced in an interface between the both films in lamination. Actually, the silicon nitride film is under tension of the thicker BPSG film. Accordingly, when the BPSG film reflows, the silicon nitride film is released from the tensile stress which has been applied thereto by the BPSG film whereby the silicon nitride film tends to shrink. As a consequence, wrinkle or cracks may occur in the silicon nitride film.
Further investigation demonstrated that in case where the silicon nitride film is thick, particularly where the cylindrical storage node 60 is formed, as shown in FIG. 18, and the silicon nitride film 58 is used as the wet etching stopper, a silicon nitride film 66 may suffer the occurrence of cracks therein, as shown in FIG. 19.
It was also found that even in a structure including the silicon nitride film 50 shown in FIG. 16, the heat treatment for planarizing the second BPSG film 51 may disadvantageously produce a partial reflow of the first BPSG film 48, thus involving a danger of producing the aforesaid wrinkle or cracks in the silicon nitride film. Supposedly, this may be because the silicon nitride film 50 does not completely block vapor penetrating therethrough downward but rather allows an amount of gases, such as vapor, to penetrate therethrough.
Hence, the conventional technique cannot ensure that even a part of the silicon nitride film does not suffer the occurrence of wrinkle or cracks therein in case where after the planarization of the interlayer insulating layer, such as BPSG film having a thermally planarizable property, one of various steps requiring the semiconductor substrate to be kept heated, such as heat treatment for planarizing the upper interlayer insulating film and thermal oxidation, is performed.